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FEATURES Low On Resistance (4 ) On Resistance Flatness 0.2 44 V Supply Maximum Ratings 15 V Analog Signal Range Fully Specified @ 5 V, +12 V, 15 V Ultralow Power Dissipation (18 W) ESD 2 kV Continuous Current 100 mA Fast Switching Times t ON 70 ns t OFF 60 ns TTL/CMOS Compatible Pin Compatible Upgrade for ADG411/ADG412/ADG413 and ADG431/ADG432/ADG433 APPLICATIONS Relay Replacement Audio and Video Switching Automatic Test Equipment Precision Data Acquisition Battery Powered Systems Sample Hold Systems Communication Systems PBX, PABX Systems Avionics GENERAL DESCRIPTION
LC2MOS 5 RON SPST Switches ADG451/ADG452/ADG453
FUNCTIONAL BLOCK DIAGRAMS
S1 IN1 D1 S2 IN2 IN2 D2 S3 IN3 D3 S4 IN4 D4 S1 IN1 D1 S2 IN2 D2 S3 D3 S4 IN4 D4 SWITCHES SHOWN FOR A LOGIC "1" INPUT IN4 D4 D3 S4 IN1 D1 S2 D2 S3 S1
ADG451
IN3
ADG452
ADG453
IN3
The ADG451, ADG452 and ADG453 are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed and low on resistance. The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed coupled with high signal bandwidth also make the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation making the parts ideally suited for portable and battery powered instruments. The ADG451, ADG452 and ADG453 contain four independent single-pole/single-throw (SPST) switches. The ADG451 and ADG452 differ only in that the digital control logic is inverted. The ADG451 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the ADG452. The ADG453 has two switches with digital control logic similar to that of the ADG451 while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
The ADG453 exhibits break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. 1. Low RON (5 max) 2. Ultralow Power Dissipation 3. Extended Signal Range The ADG451, ADG452 and ADG453 are fabricated on an enhanced LC2MOS process giving an increased signal range that fully extends to the supply rails. 4. Break-Before-Make Switching This prevents channel shorting when the switches are configured as a multiplexer. (ADG453 only.) 5. Single Supply Operation For applications where the analog signal is unipolar, the ADG451, ADG452 and ADG453 can be operated from a single rail power supply. The parts are fully specified with a single +12 V power supply and will remain functional with single supplies as low as +5.0 V. 6. Dual Supply Operation For applications where the analog signal is bipolar, the ADG451, ADG452 and ADG453 can be operated from a dual power supply ranging from 4.5 V to 20 V.
PRODUCT HIGHLIGHTS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998
ADG451/ADG452/ADG453-SPECIFICATIONS1
Dual Supply (V
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS2 Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS3 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL IGND3 0.0001 0.5 0.0001 0.5 0.0001 0.5 0.0001 0.5 A typ A max A typ A max A typ A max A typ A max
DD
= +15 V, VSS = -15 V, VL = +5 V, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
B Version TMIN to +25 C TMAX VSS to VDD 4.0 5 0.1 0.5 0.2 0.5 0.02 0.5 0.02 0.5 0.04 1 7 0.5 0.5
Units V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ pC max dB typ dB typ pF typ pF typ pF typ
Test Conditions/Comments
VD = -10 V to +10 V, IS = -10 mA VD = 10 V, IS = -10 mA VD = -5 V, 0 V, +5 V, IS = -10 mA
2.5 2.5 5 2.4 0.8
VD = 10 V, VS = 10 V; Test Circuit 2 VD = 10 V, VS = 10 V; Test Circuit 2 VD = VS = 10 V; Test Circuit 3
0.005
0.5
VIN = VINL or VINH, All Others = 2.4 V or 0.8 V Respectively RL = 300 , CL = 35 pF; VS = 10 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS = 10 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS1 = VS2 = +10 V; Test Circuit 5 VS = 0 V, RS = 0 , CL = 1.0 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 f = 1 MHz f = 1 MHz f = 1 MHz VDD = +16.5 V, VSS = -16.5 V Digital Inputs = 0 V or 5 V
70 180 60 140 15 5 20 30 65 -90 15 15 100
220 180 5
5 5 5 5
NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 TMAX = +70C. 3 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-2-
REV. A
ADG451/ADG452/ADG453 Single Supply (V
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS2, 3 Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS4 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD IL IGND4 0.0001 0.5 0.0001 0.5 0.0001 0.5 A typ A max A typ A max A typ A max
DD
= +12 V, VSS = 0 V, VL = +5 V, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
B Version TMIN to +25 C TMAX 0 V to VDD 6 8 0.1 0.5 1.0 0.02 0.5 0.02 0.5 0.04 1 10 0.5 1.0
Units V typ max typ max typ nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ pF typ pF typ pF typ
Test Conditions/Comments
VD = 0 V to 10 V, IS = -10 mA VD = 10 V, IS = -10 mA VD = 0 V, +5 V, IS = -10 mA VD = 0 V, 10 V, VS = 0 V, 10 V; Test Circuit 2 VD = 0 V, 10 V, VS = 0 V, 10 V; Test Circuit 2 VD = VS = 0 V, 10 V; Test Circuit 3
2.5 2.5 5 2.4 0.8
0.005
0.5
VIN = VINL or VINH
100 220 80 160 15 10 10 -90 15 15 100
260 200 10
RL = 300 , CL = 35 pF; VS = +8 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS = +8 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS1 = VS2 = +8 V; Test Circuit 5 VS = 0 V, RS = 0 , CL = 1.0 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 f = 1 MHz f = 1 MHz f = 1 MHz VDD = +13.2 V Digital Inputs = 0 V or 5 V
5 5 5
VL = +5.5 V VL = +5.5 V
NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 TMAX = +70C. 3 Tested with dual supplies. 4 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. A
-3-
ADG451/ADG452/ADG453-SPECIFICATIONS1
Dual Supply (V
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (RON) LEAKAGE CURRENTS2, 3 Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS4 tON tOFF Break-Before-Make Time Delay, tD (ADG453 Only) Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS IL IGND4 0.0001 0.5 0.0001 0.5 0.0001 0.5 0.0001 0.5 A typ A max A typ A max A typ A max A typ A max
DD
= +5 V, VSS = -5 V, VL = +5 V, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
B Version TMIN to +25 C TMAX VSS to VDD 7 12 0.3 0.5 0.02 0.5 0.02 0.5 0.04 1 15 0.5
Units V typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ pF typ pF typ pF typ
Test Conditions/Comments
VD = -3.5 V to +3.5 V, IS = -10 mA VD = 3.5 V, IS = -10 mA
2.5 2.5 5 2.4 0.8
VD = 4.5, VS = 4.5; Test Circuit 2 VD = 0 V, 5 V, VS = 0 V, 5 V; Test Circuit 2 VD = VS = 0 V, 5 V; Test Circuit 3
0.005
0.5
VIN = VINL or VINH
160 220 60 140 50 5 10 65 -76 15 15 100
300 180 5
RL = 300 , CL = 35 pF; VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF; VS1 = VS2 = 3 V; Test Circuit 5 VS = 0 V, RS = 0 , CL = 1.0 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 8 f = 1 MHz f = 1 MHz f = 1 MHz VDD = +5.5 V Digital Inputs = 0 V or 5 V
5 5 5 5
VL = +5.5 V VL = +5.5 V
NOTES 1 Temperature range is as follows: B Version: -40C to +85C. 2 TMAX = +70C. 3 Tested with dual supplies. 4 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-4-
REV. A
ADG451/ADG452/ADG453
Truth Table (ADG451/ADG452) Truth Table (ADG453)
ADG451 In 0 1
ADG452 In 1 0
Switch Condition ON OFF
Logic 0 1
Switch 1, 4 OFF ON
Switch 2, 3 ON OFF
PIN CONFIGURATION
(DIP/SOIC)
ORDERING GUIDE
IN1 1 D1 2 S1 3 VSS 4 GND 5 S4 6 D4 7 IN4 8
16 15
IN2 D2 S2 VDD VL S3 D3 IN3
ADG451 ADG452 ADG453
TOP VIEW (Not to Scale)
Model ADG451BN ADG451BR ADG452BN ADG452BR ADG453BN ADG453BR
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Options* N-16 R-16A N-16 R-16A N-16 R-16A
14 13 12 11 10 9
*N = Plastic DIP; R = Small Outline IC (SOIC).
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +25 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -25 V VL to GND . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V Analog, Digital Inputs2 . . . . . . . . . . . VSS -2 V to VDD +2 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150C Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 117C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG451/ADG452/ADG453 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-5-
ADG451/ADG452/ADG453
TERMINOLOGY
VDD VSS
Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to GND. Logic power supply (+5 V). Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Ohmic resistance between D and S. On resistance match between any two channels i.e., RONmax - RONmin. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Source leakage current with the switch "OFF." Drain leakage current with the switch "OFF." Channel leakage current with the switch "ON."
VD (VS) CS (OFF) CD (OFF) tON tOFF tD
Analog voltage on terminals D, S. "OFF" switch source capacitance. "OFF" switch drain capacitance. Delay between applying the digital control input and the output switching on. See Test Circuit 4. Delay between applying the digital control input and the output switching off. "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another. See Test Circuit 5. A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" switch. A measure of the glitch impulse transferred from the digital input to the analog output during switching.
VL GND S D IN RON RON RFLAT(ON)
CD, CS (ON) "ON" switch capacitance.
Crosstalk
Off Isolation Charge Injection
IS (OFF) ID (OFF) ID, IS (ON)
9 8 7 6 RON - RON - 5 4 3 2 1 -16.5 -13.5 -10.5 1.5 4.5 7.5 0 VDD = +15V VSS = -15V VDD = +16.5V VSS = -16.5V 13.5 -7.5 -4.5 -1.5 10.5 16.5 VDD = +13.5V VSS = -13.5V VDD = +5V VSS = -5V TA = +25 C VL = +5V
7 6 +85 C VDD = +15V VSS = -15V VL = +5V
5
+25 C
4 -40 C 3
2 1 0 -15 -10 -5 0 5 10 15
VD OR VS DRAIN OR SOURCE VOLTAGE - V
VD OR VS DRAIN OR SOURCE VOLTAGE - V
Figure 1. On Resistance as a Function of VD (VS) for Various Dual Supplies
Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures with Dual Supplies
-6-
REV. A
Typical Performance Characteristics-ADG451/ADG452/ADG453
16 14 VDD = +5V VSS = 0V 12 10 VDD = +16.5V VSS = 0V TA = +25 C VL = +5V
12 11 10 9 8
VDD = +15V VSS = 0V
VDD = +15V VSS = 0V VL = +5V +85 C
7
RON -
RON -
+25 C
8 6 4 2 0
VDD = +13.5V VSS = 0V
6 5 4 3 2 1 -40 C
0
3
6
9
12
15
18
0 0 2 4 6 8 10 12 14 16 VD OR VS DRAIN OR SOURCE VOLTAGE - V
VD OR VS DRAIN OR SOURCE VOLTAGE - V
Figure 3. On Resistance as a Function of VD (VS) for Various Single Supplies
Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures with Single Supplies
10 VDD = +15V VSS = -15V VL = +5V VD = +15V VS = -15V 1.0 ID(ON)
0.5 0.4 0.3
LEAKAGE CURRENT - nA
LEAKAGE CURRENT - nA
0.2 0.1 0 -0.1 -0.2 -0.3 -0.4
VDD = +15V VSS = -15V TA = +25 C VL = +5V
ID(ON) IS(OFF) ID(OFF)
0.1
ID(OFF)
0.01 25 35
IS(OFF) 45 55 65 TEMPERATURE - C 75 85
-0.5 -15
-12
-9
-6
-3
0
3
6
9
12
15
VD OR VS DRAIN OR SOURCE VOLTAGE - V
Figure 4. Leakage Currents as a Function of Temperature
Figure 7. Leakage Currents as a Function of VD (VS)
100k VDD = +15V VSS = -15V VSS = +5V 4SW
70 VDD = +15V VSS = -15V VL = +5V
10k 1k
A
60
OFF ISOLATION - dB
1SW
50 40
ISUPPLY -
100 I+, I+ 10 IL 1.0
30
20 10 0
0.1 0.01 10 100 1k 10k 100k 1M 10M FREQUENCY - Hz
1
10 FREQUENCY - MHz
100
Figure 5. Supply Current vs. Input Switching Frequency
Figure 8. Off Isolation vs. Frequency
REV. A
-7-
ADG451/ADG452/ADG453
120 VDD = 15V VSS = -15V VL = 5V RLOAD = 50
APPLICATION
100
80
CROSSTALK - dB
60
Figure 11 illustrates a precise, fast, sample-and-hold circuit. An AD845 is used as the input buffer while the output operational amplifier is an AD711. During the track mode, SW1 is closed and the output VOUT follows the input signal VIN. In the hold mode, SW1 is opened and the signal is held by the hold capacitor CH.
+15V +5V 2200pF +15V D D RC 75 CC 1000pF
40
20 +15V 0 100 1k 10k 100k 1M 10M 100M VIN AD845
SW2 S S SW1 -15V
AD711 -15V CH 2200pF
VOUT
FREQUENCY - Hz
Figure 9. Crosstalk vs. Frequency
ADG451/ 452/453
0 -0.5 -1.0
LOSS - dB
-15V
VDD = 15V VSS = -15V VL = 5V
Figure 11. Fast, Accurate Sample-and-Hold Circuit
-1.5
-2.0 -2.5 -3.0
Due to switch and capacitor leakage, the voltage on the hold capacitor will decrease with time. The ADG451/ ADG452/ADG453 minimizes this droop due to its low leakage specifications. The droop rate is further minimized by the use of a polystyrene hold capacitor. The droop rate for the circuit shown is typically 30 V/s. A second switch, SW2, that operates in parallel with SW1, is included in this circuit to reduce pedestal error. Since both switches will be at the same potential, they will have a differential effect on the op amp AD711, which will minimize charge injection effects. Pedestal error is also reduced by the compensation network RC and CC. This compensation network reduces the hold time glitch while optimizing the acquisition time. Using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mV over the 10 V input range. Both the acquisition and settling times are 850 ns.
-3.5 1
10 FREQUENCY - MHz
100
200
Figure 10. Frequency Response with Switch On
-8-
REV. A
ADG451/ADG452/ADG453 Test Circuits
IDS
IS(OFF)
V1
IS(OFF)
ID(ON)
VS
VS RON = V1/IDS
VD
VS
VD
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
+15V 0.1 F
+5V 0.1 F 3V
VDD S
VL D VOUT RL 300 CL 35pF
ADG451 VIN
50%
50%
3V VIN ADG452 VOUT 90% 90% 50% 50%
VS IN
VIN
GND
VSS
0.1 F -15V
tON
tOFF
Test Circuit 4. Switching Times
+15V 0.1 F
+5V 0.1 F 3V
VDD
VL
VIN 0V D1 RL1 300 VOUT1 CL1 35pF VOUT1 0V
50%
50%
ADG453
VS1 S1
90%
90%
VS2
S2
D2 VOUT2 RL2 300 CL2 35pF
IN1, IN2
90% VOUT2 GND VSS 0V
90%
VIN
tD
0.1 F -15V
tD
Test Circuit 5. Break-Before-Make Time Delay
REV. A
-9-
ADG451/ADG452/ADG453
+15V +5V V RS VS IN S VL D CL 10nF VIN 3V VOUT
VOUT VIN = CL VOUT
VOUT
GND
VDD
-15V
Test Circuit 6. Charge Injection
+15V 0.1 F
+5V 0.1 F
VDD S
VL D VOUT RL 50
VS
IN
GND VIN 0.1 F
VSS
-15V
Test Circuit 7. Off Isolation
+15V 0.1 F
+5V 0.1 F
S
D
50
VS
VIN1 VIN2
VOUT RL 50
S
D
NC
GND
VSS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG|VS /VOUT| 0.1 F -15V
Test Circuit 8. Channel-to-Channel Crosstalk
-10-
REV. A
ADG451/ADG452/ADG453
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic DIP (N-16)
0.840 (21.34) 0.745 (18.92)
16 1 9 8
0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC
0.325 (8.26) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
0.070 (1.77) SEATING 0.045 (1.15) PLANE
0.015 (0.381) 0.008 (0.204)
16-Lead SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80)
16 1 9 8
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) x 45 0.0099 (0.25)
0.0500 SEATING (1.27) PLANE BSC
0.0192 (0.49) 0.0138 (0.35)
8 0.0099 (0.25) 0 0.0075 (0.19)
0.0500 (1.27) 0.0160 (0.41)
REV. A
-11-
-12-
C3119a-0-2/98
PRINTED IN U.S.A.

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